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Photonic Integrated Circuit (PIC) testing for next-generation networks

Written by CControls Team | 24.10.2024 11:08:35

Meeting the Challenges of Photonic Integrated Circuit (PIC) testing for next-generation networks

Optical testing is currently a major bottleneck in component manufacturing due to tighter tolerances in optical wafer testing compared to electrical testing, accounting for 80% of the test and assembly cost of the final product. The collaborative EXFO, HPE, and MPI solution addresses this issue, making wafer testing faster and more reliable, ultimately improving speed-to-market for component manufacturers.

Improved PIC testing takes on even greater importance in the context of next-generation networks given that silicon photonic wafers are critical building blocks for emerging technologies in high-speed data centers and 5G networks. With the tsunami of data driven by 5G, the pressures of incremental high-speed interconnectivity with data centers, and the sheer volume of network components, testing at every stage of network design and deployment is critical to success.

Three industry innovators – EXFO, Hewlett Packard Enterprise (HPE) and MPI Corporation – have combined forces to address the challenges posed by optical component testing with faster and more reliable measurement techniques. The Photonic Integrated Circuit (PIC) testing solution has been taken from concept to reality.

 

Describing here the impact of the EXFO, HPE and MPI solution

Lawrence Van Der Vegt, Subject Matter Expert at EXFO and Ashkan Seyedi, Senior Research Scientist at HPE and Sebastian Giessmann, Product Marketing Manager at MPI give an overview.

Lawrence, can you describe the collaborative testing solution created by EXFO, HPE and MPI?
Sure, our collaboration provides a streamlined, fast, and accurate approach to PIC testing – a one-stop shop to alleviate any possible component testing bottlenecks and enable faster time-to-market. The interoperability between our three companies provides low power, integrated, and automated PIC testing at the wafer level for higher reliability, greater flexibility and scalability than ever before. These fast and accurate measurements support applications from R&D lab testing to full-scale manufacturing.

Ashkan, how did these three companies come together to create this solution?
As experts in our respective fields our companies often came together to meet customer requirements, so it was logical that we would combine our technology to deliver this fully automated test solution. Interoperability in the form of a combined solution was the key goal behind this collaboration that ensures an automated and effective approach to wafer-level testing.

Sebastian, can you share details of the launch?
As mentioned earlier, OFC was the setting for the first live demo of this joint PIC testing solution. We highlighted it as ‘Tiny PICs, Huge Impact’ because that encompasses the relevance of this test to the market. The fully automated test solution was demoed at OFC, something that people don’t often have a chance to see outside a clean room/lab environment. The demo showed the speed, flexibility, and scalability of the solution and it was well received by attendees.

Lawrence, can you speak to how EXFO’s test solution works and what it brings to the mix?
Yes, EXFO provides advanced, automated PIC testing equipment that’s virtually unrivalled in the industry because of the fast, accurate, and reliable results. The CTP10 and T100S-HP combination enables swept laser testing of passive optical components at a picometer resolution and at high speed, even under the most stringent conditions. With the auto-alignment capability of the CTP10, the lowest possible time is required to find the optimum position for the wafer in and out of the PIC test.

Ashkan, what is HPE’s role and what does HPE’s commitment mean to the industry?
At HPE we’re committed to providing essentially better computer hardware components to handle the data deluge experienced by all network operators today. That starts at the wafer level where HPE relies on customer co-design/optimization using HPE’s Silicon Photonics (SiPh). I’m pleased to say that HPE’s wafer technology is at the heart of the EXFO, HPE, and MPI collaborative solution.

Sebastian, how does MPI’s technology integrate?
MPI’s PIC-specialized wafer probe stations enable precision optical component alignment, and other dedicated functionality within the unique SENTIO® software. This is the most advanced prober control software on the market with unmatched intuitive prober control. We look forward, along with EXFO and HPE, to helping customers achieve the most accurate on-wafer measurements available in today’s market.

 

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